(1) Field of the Invention
The present invention relates to a solid-state imaging device, and more particularly to a Charge Coupled Device (CCD) solid-state imaging device, a signal charge detection device, and a camera.
(2) Description of the Related Art
In recent years, there has been increasing demand for solid-state imaging devices as imaging devices in digital still cameras, digital video cameras, and the like. Further, portable terminal devices represented by a portable telephone are required to have a camera function, so that the demand for the solid-state imaging device has also been growing for imaging devices in such portable terminal devices. Furthermore, with the aim of realizing high-resolution image, the number of pixels in the solid-state imaging device tends to be increased year by year. Still further, with the requirement for high sensitivity of the digital still cameras, the digital video cameras, the portable terminal devices, and the like, high sensitivity and high signal-to-noise (S/N) ratio of the solid-state imaging device have been also required.
The conventional solid-state imaging device is described herein below with reference to FIGS. 1 to 3. Firstly, a schematic structure of the conventional solid-state imaging device is described. FIG. 1 is a schematic plane view showing a structure of the conventional CCD solid-state imaging device. As shown in FIG. 1, the CCD solid-state imaging device has a semiconductor substrate 101. On the semiconductor substrate 101 are formed: a plurality of light receiving units 102 which are arranged two-dimensionally; vertical transfer units (vertical CCDs) 103 each of which is arranged along each column of the light receiving units 102 in a vertical direction; and a horizontal transfer unit (horizontal CCD) 104 which is arranged adjacent to the final row of the light receiving units 102. Each of the light receiving units 102 is a photodiode for accumulating electric charges (or simply “charges”) corresponding to intensity of received light. Note that one light receiving unit 102 and a part of a vertical CCD 103 adjacent to the light receiving unit 102 form one pixel 108.
As shown by arrows of FIG. 1, the charges accumulated in each of the light receiving units 102 are read out and provided to the vertical CCD 103, and transferred in a vertical direction by the vertical CCD 103. The charges transferred by each of the vertical CCDs 103 are transferred in a horizontal direction by the horizontal CCD 104, then amplified by an amplifier 105, and eventually outputted to the outside. This is disclosed in Japanese Patent Application Laid-Open No. 6-252179, for example.
Next, a structure of the amplifier 105 is described in detail with reference to FIG. 2. FIG. 2 is a circuit diagram showing an example of the amplifier unit 105. FIG. 2 shows an amplifier having three-stage source followers. The source follower at the first stage includes a driver transistor Tr1D and a load transistor Tr1L. The driver transistor Tr1D converts the charges transferred by the horizontal CCD 104 into a voltage. The load transistor Tr1L supplies a constant current. The source follower circuits at the second and third stages have the same structure as described for the first-stage source follower, except that an input is a voltage outputted from a prior stage.
Furthermore, the horizontal CCD 104 and the driver transistor Tr1D are described in more detail below.
FIG. 3 is an enlarged plane view showing a part enclosed by a dashed line a1 in the solid-state imaging device of FIG. 1. As shown in FIG. 3, a floating diffusion region 201 of FIG. 3 is a triangle region surrounded by an output gate (OG) 202 and a reset gate (RG) 203 at the end of the horizontal CCD 104. The driver transistor Tr1D of FIG. 2 is a Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) 207. A drain 207a of the driver transistor Tr1D is connected to a power voltage Vdd and a source 207c of the driver transistor Tr1D is connected to the load transistor Tr1L of FIG. 2 which is a load MOSFET and a power source of constant current. The floating diffusion region 201 and the driver transistor Tr1D at the first stage of the amplifier 105 are electrically connected to each other by the first wire 205.
The signal charges in the horizontal CCD 104 are transferred to the floating diffusion region 201 via the output gate 202. Depending on the signal charges transferred to the floating diffusion region 201, an electric potential of the first wire 205 is varied. The amplifier 105 outputs this potential as a voltage. Furthermore, the floating diffusion region 201 drains the signal charges to a reset drain (RD) 204 by a pulse applied to the reset gate 203, so that the signal charges become equivalent to the power voltage.
Moreover, the above-mentioned Japanese Patent Application Laid-Open No. 6-252179 discloses a solid-state imaging device in which a shield wire for electrically shielding the floating diffusion region is arranged between the floating diffusion region and a region which a pulse is applied to and exists at the periphery of the floating diffusion region. Thereby, a coupling capacity of the floating diffusion region and the region which a pulse is applied to and exists at the periphery of the floating diffusion region is reduced, which makes it difficult for the pulse noises to be induced from the periphery to a signal output outputted from the signal charge detection device. As a result, waveform distortion of the above signal output is reduced.